CISC versus RISC

The project I am working on is using a PIC32 microcontroller made by Microchip Corporation. A microcontroller is basically a CPU with some memory and some special hardware all integrated into one chip. It uses a MIPS CPU (which is some of the Intellectual Property you hear about). So I'm reading up on it and I find it does not have a hardware call stack. What!?!?! No hardware stack!?! How can that be? Ever microprocessor I have ever dealt with had a stack implemented in hardware. But after a couple of seconds reflection I realize you don't need a hardware stack, you just need a calling convention: which register you are going to use for a stack pointer, whether parameters are passed on the stack or in registers, whether the stack is push up or push down. It's really no big deal. You have to have calling conventions whatever kind of processor you use. If you don't have a hardware stack, it's just one more thing that has to be done in software, and if you are using a high level language, you don't even have to worry about it, the compiler takes care of it for you.

Back when I got started in this racket I was working with the Intel 8086, which had several unique "features". One of them was a special addition to the hardware stack. You could add a number to the return instruction (in assembly language) and the CPU would automatically adjust the stack pointer back to where it was before the caller started pushing parameters on the stack. But then C came along, and C's calling convention was that the caller removed the stuff from the stack, not the callee, so that special instruction doesn't get used much anymore.

Another feature was the repeat function. Normally if you want to move a bunch of stuff in memory you set up a loop with a counter and move one item for each iteration of the loop until your counter has gone to zero. With 8086, you could load up the registers with locations and counts and with one instruction it would perform the complete move. Of course it couldn't move everything with one cycle, but it didn't have to keep fetching instructions while performing the move. The CPU would just keep executing the same instruction over again and adjusting the relevant registers until the count register went to zero. This was a big advantage back in the days before we had cache, because in those days every instruction fetch competed with data load and store operations for access to memory. No instruction fetches meant your memory copies went very quickly.